Electrical pulse counters – pulse dividers – or shift registers: c – Shift register – Asynchronous
Patent
1985-01-08
1987-07-07
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Shift register
Asynchronous
377 77, 377 81, 377 69, H03K 2358, G11C 1900
Patent
active
046792139
ABSTRACT:
A queue form of asynchronous register is disclosed with signal paths commonly carrying elements of both data and control. Binaries are intercoupled in two sequences and are individually cross coupled to register "one" bits in one sequence and "zero" bits in the other. Bits are manifest by signal level changes. Individual binaries are driven by logic to accomplish an operational rule based on the states of neighboring binaries in both sequences. Each binary in each sequence is controlled by the states of the predecessor and successor in its sequence and the predecessor and successor of its associated binary in the other sequence. Specifically, if predecessor and successor binaries in a sequence are in different states, and predecessor and successor binaries of an associated binary in the other sequence are in the same state, the state of the predecessor is to be taken.
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Seitz, "Introduction to VLSI Systems", Addison Wesley Publishers, Mead & Conway, Chapter 7, Illustration 7.24.
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