Asynchronous ping-pong counter and thereof method

Details Asynchronous ping-pong counter and thereof method Asynchronous ping-pong counter and thereof method

2011-01-25

2011-01-25

Lam, Tuan (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Starting, stopping, presetting or resetting the counter

C377S118000, C377S119000

Reexamination Certificate

active

07876873

ABSTRACT:
An asynchronous ping-pong counter is disclosed. The asynchronous ping-pong counter comprises a first asynchronous counter, a second synchronous counter, and a controller, the asynchronous ping-pong counter operates between a first state and a second state. In the first state, the first asynchronous counter counts a first number of clock edges of a fast clock signal, and the second asynchronous counter holds a first counter output value. In the second state, the second asynchronous counter counts a second number of clock edges of the fast clock signal, and the first asynchronous counter holds a second counter output value. The controller determines a state transition based on a sampling of a slow clock signal by the fast clock signal.

REFERENCES:
patent: 6219798 (2001-04-01), Choi
patent: 6222900 (2001-04-01), Hara
patent: 6548997 (2003-04-01), Bronfer et al.
patent: 6735270 (2004-05-01), Yeung
patent: 2009/0307518 (2009-12-01), Hsieh

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