Asynchronous parallel data formatter

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 942, 370102, H04J 322

Patent

active

052672360

ABSTRACT:
An asynchronous parallel data formatter for use in mapping low speed serial asynchronous data signals into a higher speed signal includes a set of latches that receive the data from an elastic store. A time domain multiplexer receives signals from the latches as well as signals from an adder is responsive to one or more signals indicative of a need to recirculate data that provides stuff control signals and a carry signal. A formatter receives signals output from the time domain multiplexer and provides stuff and control bits as needed to complete the payload signal. The present asynchronous parallel data formatter provides sequential data transfer of full data bytes into partial bytes using one clock and a single set of control circuitry.

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