Asynchronous linked data structure traversal

Details Asynchronous linked data structure traversal Asynchronous linked data structure traversal

2005-08-16

2008-09-02

Alam, Hosain T (Department: 2166)

Data processing: database and file management or data structures

Database design

Data structure types

C707S793000, C707S793000, C710S022000, C711S170000

Reexamination Certificate

active

07421453

ABSTRACT:
Asynchronously traversing a disjoint linked data structure is presented. A synergistic processing unit (SPU) includes a handler that works in conjunction with a memory flow controller (MFC) to traverse a disjoint linked data structure. The handler compares a search value with a node value, and provides the MFC with an effective address of the next node to traverse based upon the comparison. In turn, the MFC retrieves the corresponding node data from system memory and stores the node data in the SPU's local storage area. The MFC stalls processing and sends an asynchronous event interrupt to the SPU which, as a result, instructs the handler to retrieve and compare the latest node data in the local storage area with the search value. The traversal continues until the handler matches the search value with a node value or until the handler determines a failed search.

REFERENCES:
patent: 6978271 (2005-12-01), Hoffman et al.
patent: 2004/0103086 (2004-05-01), Vinnakota et al.
patent: 2005/0131867 (2005-06-01), Wilson
Gilbert Sih and Edward Lee, A Compile-Time Scheduling Heuristic for Interconnection-constrained Heterogeneous Processor Architectures, Feb. 2, 1993, IEEE, p. 175-186.

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