Asynchronous data transmission system with state variable memory

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370 60, 370 91, 375 11D, 179 18FG, 34082501, 34082552, 3072383, G06F 300, G06F 1300

Patent

active

043909698

ABSTRACT:
This disclosure relates to a system and method for realizing asynchronous sequential circuits in a manner analagous to the stored state method for synchronous sequential circuits. The circuit is a stored state circuit including a memory and an output register with an input line and an input request line coupled to the memory and the output register having an output data line and an output acknowledge line. A pulse generator is coupled to the input request line so as to generate a timing signal, for transmission to the output register, a fixed period of time after receipt of a request signal on the input request line. A request signal will not appear on the input request line until a data signal on the input data line has stabilized. Furthermore, an acknowledge signal will not be generated until a signal on the output data line has stabilized. In this manner, an asynchronous sequential circuit is constructed which allows for utilization of existing component parts and provides for hazard-free and race-free implementations.

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