Asynchronous data transmission system

Patent

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Details

395250, 395873, G06F 1338

Patent

active

055028225

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

The present invention relates to an asynchronous data transmission system which can suitably realize intermittent asynchronous transmission of continual data between two system controllers or in a star or tree type network.


BACKGROUND ART

For data transmission between two system controllers, a buffer device for providing hardware synchronism and speed adjustment is usually provided between these controllers.
In a prior art data transmission system, such a buffer device as mentioned above is provided in single so that access from one controller has a preference over access from the other to avoid access collision.
With such a prior art arrangement, however, in the case where data transmission is intended from a system controller A to a system controller B and a write request from the controller A is set to have a preference over a read request from the controller B for example, there occurs such a problem that the write request during the reading operation causes different data before and after the reading, which results in that the controller B cannot handle the data of the controller A at the same time and having the contents as the controller B.
Even in the case where a dual port memory is used, this is a big problem when a package of data is transmitted from the system controller A to the system controller B, that is, accurate data transmission cannot be achieved.
In this type of data transmission, the system controllers A and B usually use mutually different system clocks. For this reason, a write request from the controller A and a read request from the controller B may be generated exactly simultaneously in synchronism with the different system clocks, in which case the write and read requests to the same memory collide with each other.
In view of the such circumstances, it is an object of the present invention to provide an asynchronous data transmission system which can accurately and reliably transmit a large quantity of data in the form of a single package between system controllers without any handshake.
Another object of the present invention is to provide an asynchronous data transmission system which can realize accurate and reliable data transmission between two system controllers having different system clocks.


DISCLOSURE OF THE INVENTION

In accordance with a first invention, there is provided an asynchronous data transmission system for asynchronously transmitting data from a first system controller to a second system controller, which comprises: first and second memories for writing therein output data of the first system controller and for reading out therefrom the written data to the second system controller; and control means, in response to data transmission of the first system controller to the second system controller, for alternately writing the output data of the first system controller into the first and second memories, for selecting one of the first and second memories in which the data is written immediately previously when the second system controller receives the data and, for reading out the data from the selected memory, in which the control means, at the time of performing the writing operation, if the second system controller is performing reading operation over one of the first and second memories, writes the output data of the first system controller into the other one of the memories opposite to the one of the memories over which the reading operation is carried out, while at the time of performing the reading operation, if the first system controller is performing writing operation over one of the first and second memories, reads the data from the other one of the memories opposite to the one of the memories over which the writing operation is carried out.
In the first invention, a memory for holding therein data to be transmitted is arranged to have a duplex structure including first and second memories. The control means, in response to the data transmitting operation of the first system controller and the data receiving operation of the seco

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