Asynchronous circuit and system

Details Asynchronous circuit and system Asynchronous circuit and system

1975-10-14

1979-09-11

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 100

Patent

active

041677897

ABSTRACT:
An asynchronous logic circuit is provided having three stable states, namely two information states and a neutral state. Information is transferred between cascaded such circuits wholly under the control of such circuits and at a rate determined by the delay times through various gates. Feedback is employed between each circuit so that for any two given circuits the transfer logic is IN.fwdarw.NI, I representing an information state and N representing the neutral state. Reversible cascaded chains are discussed as well as parallel feed-in and feed-out of information, and fan-in, fan-out and recirculating loops of information. The cascaded circuits (nets) employ interface circuits comprising in most instances a specified part of the basic net circuit.

REFERENCES:
patent: 3166737 (1965-01-01), Sparacio
patent: 3460098 (1969-08-01), DeBlauw

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