Patent
1991-10-28
1996-12-31
Kriess, Kevin A.
39520002, 39520003, 3952001, 395680, G06F 1516
Patent
active
055902812
ABSTRACT:
A network interface resident on one processor enables heterogenous processors interconnected by a common network to exchange control and data information via virtual circuits created and maintained by the network interface between sockets defined at the communicating processors. Different kinds of messages are discriminated and their length is determined to enable the same network virtual circuit to mulitplex data and control information in a manner that is message specific and conserves network resources. Data conversion is implemented to enable heterogeneous processors to communicate over the network virtual circuit. Asynchronous, bidirectional communication is provided by the network interface for tightly-coupled, moderately-coupled, and loosely-coupled hardware architecture conformance types.
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"Standards and Protocols for Communications Networks" by James W. Conard, 82 Section III.
Kriess Kevin A.
Lall Prithvi C.
McGowan Michael J.
Oglo Michael F.
Richey Michael T.
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