Asynchronous adder circuit

Details Asynchronous adder circuit Asynchronous adder circuit

1980-07-14

1982-07-06

Smith, Jerry

Boots, shoes, and leggings

G06F 750

Patent

active

043386768

ABSTRACT:
An adder circuit for generating a completion signal indicating the completion of adder operation. A detector circuit (103) is connected to the power supply bus (102) of a multistage parallel adder for detecting voltage variations caused by the operation of the adder stages and for generating a completion signal when these voltage variations have ceased to occur for a predetermined period of time.

REFERENCES:
patent: 3056552 (1962-10-01), Wagner
patent: 3154675 (1964-10-01), Homan
patent: 3244865 (1966-04-01), Sussenguth, Jr.
patent: 3843876 (1974-10-01), Fette et al.
patent: 3947671 (1976-03-01), Geng et al.
patent: 3993891 (1976-11-01), Beck et al.
patent: 4152775 (1979-05-01), Schwartz
G. A. Blaauw, Digital System Implementation, 1976, Prentice-Hall, Inc., Chapter 2, pp. 58-59.
Y. Chu, Digital Computer Design Fundamentals, 1962, McGraw-Hill Book Company, Inc., Chapter 10, pp. 388-390.

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