Static information storage and retrieval – Addressing – Sync/clocking
Patent
1991-10-15
1994-05-24
LaRoche, Eugene R.
Static information storage and retrieval
Addressing
Sync/clocking
36523008, 36523001, G11C 700, G11C 1134
Patent
active
053155599
ABSTRACT:
An asynchronous access type semiconductor memory device allows a memory cell array to supply a new data bit to an output data buffer unit for producing an output data signal indicative of the new data bit, and a data latching unit decides whether or not the new data bit is transferred to the output data buffer unit in view of lapse of time from address change to an address location assigned to a memory cell storing the new data bit so that the output data buffer unit is prevented from unexpected data bit read out upon false address change.
REFERENCES:
patent: 4701889 (1987-10-01), Ando
patent: 4717835 (1988-01-01), Takeuchi
patent: 4849938 (1989-07-01), Fuowtani et al.
patent: 4922461 (1990-05-01), Hayakawa et al.
patent: 5047984 (1991-09-01), Monden
LaRoche Eugene R.
NEC Corporation
Nguyen Viet Q.
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