Patent
1994-01-31
1998-01-13
Swann, Tod R.
395474, 395483, G06F 1314
Patent
active
057087954
ABSTRACT:
In an asynchronous access system for a multiprocessor system having a plurality of processor modules connected to a system bus and at least one shared memory module connected to the system bus, each of the processor modules includes a processor and an internal buffer. The processor writes data into the internal buffer, and the data is read from the internal buffer and is written into the shared memory via the system bus. The asynchronous access system includes a first unit, provided in each of the processor modules, for detecting a predetermined situation regarding a data write from the processor to the shared memory, and a second unit, provided in each of the processor modules, for causing the data stored in the internal buffer to be written into the shared memory module when the first unit detects the predetermined situation.
REFERENCES:
patent: 4885680 (1989-12-01), Anthony et al.
patent: 5010477 (1991-04-01), Omoda et al.
patent: 5129093 (1992-07-01), Muramatsu et al.
patent: 5214775 (1993-05-01), Yabushita et al.
patent: 5218680 (1993-06-01), Farrell et al.
patent: 5287473 (1994-02-01), Mohan et al.
patent: 5297260 (1994-03-01), Kametani
patent: 5353416 (1994-10-01), Olson
patent: 5371896 (1994-12-01), Gove et al.
Funaki Jun
Kabemoto Akira
Sugahara Hirohide
Fujitsu Limited
Swann Tod R.
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