Asymmetry correction for magneto-resistive heads

Dynamic magnetic information storage or retrieval – General processing of a digital signal – Head amplifier circuit

Reexamination Certificate

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Details

C327S317000

Reexamination Certificate

active

07092180

ABSTRACT:
An asymmetry-reducing circuit adapted to process an input signal having positive and negative pulses of different amplitudes and generate a corresponding balanced signal having positive and negative pulses of substantially uniform amplitudes. The asymmetry-reducing circuit balances the input signal by providing signal contributions corresponding to the second and third orders of the input signal. In a representative embodiment, the asymmetry-reducing circuit includes a differential amplifier and a plurality of arrayed MOS transistors connected to its inputs and outputs such that source-to-drain conductance of the transistors provides input and feedback resistances to the amplifier. A switch set selectively couples the fingers (gates) of the transistors to the input signal to modulate the source-to-drain conductance with said signal such that the input and feedback resistances change in a complementary manner. Advantageously, circuits of the invention can correct signal asymmetry within a relatively wide asymmetry range.

REFERENCES:
patent: 6043943 (2000-03-01), Rezzi et al.
patent: 6147828 (2000-11-01), Bloodworth et al.
patent: 6449110 (2002-09-01), DeGroat et al.
patent: 6587292 (2003-07-01), Ashley et al.
patent: 6633447 (2003-10-01), Franck et al.
patent: 6707623 (2004-03-01), Pisati et al.

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