Asymmetrical double gate or all-around gate MOSFET devices...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

Reexamination Certificate

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C257S316000, C257S192000, C257S347000, C257SE29302, C257SE21415

Reexamination Certificate

active

06800885

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to semiconductor devices and, more particularly, to asymmetric double gate or all-around gate metal-oxide semiconductor field-effect transistor (MOSFET) devices and methods of making these devices.
BACKGROUND OF THE INVENTION
Scaling of device dimensions has been a primary factor driving improvements in integrated circuit performance and reduction in integrated circuit cost. Due to limitations associated with gate-oxide thicknesses and source/drain (S/D) junction depths, sealing of existing bulk MOSFET devices below the 0.1 &mgr;m process generation may be difficult, if not impossible. New device structures and new materials, thus, are likely to be needed to improve FET performance.
Double-gate MOSFETs represent devices that are candidates for succeeding existing planar MOSFETs. In double-gate MOSFETs, the use of two gates to control the channel significantly suppresses short-channel effects. A FinFET is a double-gate structure that includes a channel formed in a vertical fin. Although a double-gate structure, the FinFET is similar to existing planar MOSFETs in layout and fabrication techniques. The FinFET also provides a range of channel lengths, CMOS compatibility, and large packing density compared to other double-gate structures.
SUMMARY OF THE INVENTION
Implementations consistent with the principles of the invention provide asymmetric double gate and all-around gate FinFET devices and methods for manufacturing these devices.
In one aspect consistent with the principles of the invention, a metal-oxide semiconductor field-effect transistor (MOSFET) includes a first fin formed on a substrate; a second fin formed on the substrate; a first gate formed adjacent first sides of the first and second fins, the first gate being doped with a first type of impurity; and a second gate formed between second sides of the first and second fins, the second gate being doped with a second type of impurity.
According to another aspect, a method for forming gates in a MOSFET is provided. The method includes forming a fin structure on a substrate; forming a first doped gate structure adjacent the fin structure; removing a portion of the fin structure; and forming a second doped gate structure by filling at least some of the removed portion of the fin structure with gate material.
According to yet another aspect, a MOSFET includes multiple fins, a first gate structure doped with a first type of impurity and formed adjacent a first side of one of the fins; a second gate structure doped with the first type of impurity and formed adjacent a first side of another one of the fins; a third gate structure doped with a second type of impurity and formed between two of the fins; and a fourth gate structure formed at least partially beneath one or more of the fins.
According to a further aspect, a method for forming gates in a MOSFET is provided. The method includes forming a fin structure on a substrate; forming first and second doped gate structures adjacent the fin structure; removing one or more portions of the fin structure to form multiple fins; forming a third doped gate structure between the fins; and forming a fourth gate structure extending at least partially under at least one of the fins.


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