Asymmetric voltage monitor for series supplies

Communications: electrical – Condition responsive indicating system – Specific condition

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Details

340636, 324434, 320 48, 338137, G08B 2100

Patent

active

048396338

ABSTRACT:
Disclosed is a supply voltage monitor for detecting the asymmetric decay of one voltage source (V.sub.dd) with respect to another voltage source (V.sub.ss). The monitor circuit (24) includes a resistive voltage divider (26) having a plurality of voltage tap positions (32,35,38). A sensor transistor (40) monitors the voltage between a common connection (16) connecting the voltage sources and the voltage at a desired tap position (38) of the divider network (26). On detecting an imbalance between the voltage sources (V.sub.dd, V.sub.ss), the sensor transistor (40) drives a current mirror circuit (42). The current mirror circuit (42) defines an output (50) of the monitor circuit (24), together with a reference transistor (48) biased by a voltage of the divider network (26).

REFERENCES:
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patent: 4012710 (1977-03-01), Ward et al.
patent: 4134060 (1979-01-01), Feldman
patent: 4181878 (1980-01-01), Murari et al.
patent: 4424491 (1984-01-01), Bobbett et al.
patent: 4463271 (1984-07-01), Gill, Jr.

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