Asymmetric vector multiprocessor composed of a vector unit and a

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395375, 395500, 3642251, 364DIG1, G06F 930

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active

055618081

ABSTRACT:
A vector multiprocessor comprises a plurality of scalar units for executing a scalar instruction and a vector unit for executing a vector instruction, and processes, through a single vector unit, vector instructions transmitted from the plurality of scalar units having architectures different from those of the vector unit. The vector unit comprises one or more instruction converting circuits, each corresponding to each of the one or more architectures of the plurality of scalar units different from the architecture of the vector unit, for converting vector instructions transmitted from the one or more scalar units into instruction forms executable in the vector unit, and a vector instruction executing unit for executing a vector instruction transmitted from the instruction converting circuit or from the scalar unit having the compatible architecture as the vector unit.

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