Asymmetric sense-amp flip-flop

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S208000

Reexamination Certificate

active

07855587

ABSTRACT:
An Asymmetric Sense-Amp Flip-Flop (ASAFF) is disclosed that may achieve zero setup time and short clock-to-Q delays. The ASAFF captures input data at a clock transition by setting values of a first node and a second node in a manner that is input data value dependent. If the input data is at the first input data value, the first node is set and held at a first storage value after a first delay, and the second node is set and held at a second storage value after a second delay, and if the input data is at a second input data value, the first node is set and held at a third storage value after a third delay, and the second node is set and held at a fourth storage value, after a fourth delay. This internal-path dependent difference in delay enables ASAFF to achieve zero setup time.

REFERENCES:
patent: 5025174 (1991-06-01), Shikata
patent: 5867049 (1999-02-01), Mohd
patent: 5920218 (1999-07-01), Klass et al.
patent: 6107853 (2000-08-01), Nikolic et al.
patent: 6278308 (2001-08-01), Partovi et al.
patent: 6388471 (2002-05-01), Lu et al.
patent: 6404253 (2002-06-01), Hwang et al.
patent: 6417711 (2002-07-01), Fulkerson
patent: 6433601 (2002-08-01), Ganesan
patent: 6486719 (2002-11-01), Kim
patent: 6563356 (2003-05-01), Fulkerson
patent: 7218160 (2007-05-01), Wada et al.
Pham, D., et al., “the Design and Implementation of a First-Generation CELL Precessor.”Digest of Technical Papers. 2005 IEEE International Solid-State Circuits Conference: pp. 184-185, (Feb. 2005).
Gronowski, Paul, et al. “High-Performance Microprocessor Design.”IEEE Journal of Solid-State Circuits, vol. 33, No. 5; pp. 676-686, (May 1998).
Klass, Fabian, et al. “A New Family of Semidynamic and Dynamic Flip-Flops with Embedded Logic for High-Performance Processors.”IEEE Journal of Solid-State Circuits, vol. 34, No. 5: pp. 712-716, (May 1999).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Asymmetric sense-amp flip-flop does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Asymmetric sense-amp flip-flop, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Asymmetric sense-amp flip-flop will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4222606

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.