Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Reexamination Certificate
2006-01-31
2006-01-31
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
C257S335000
Reexamination Certificate
active
06992339
ABSTRACT:
Some embodiments provide a memory cell that includes a body region, a source region and a drain region. The body region is doped with charge carriers of a first type, the source region is disposed in the body region and doped with charge carriers of a second type, and the drain region is disposed in the body region and doped with charge carriers of the second type. The body region and the source region form a first junction, the body region and the drain region form a second junction, and a conductivity of the first junction from the body region to the source region in a case that the first junction is unbiased is substantially less than a conductivity of the second junction from the body region to the drain region in a case that the second junction is unbiased.
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De Vivek K.
Keshavarzi Ali
Khellah Muhammad M.
Lu Shih-Lien L.
Paillet Fabrice
Buckley Maschoff & Talwalkar LLC
Nguyen Thinh T
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