Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2008-07-29
2008-07-29
Andujar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C438S107000, C257SE23169
Reexamination Certificate
active
07405476
ABSTRACT:
An apparatus includes a first semiconductor die and at least one further semiconductor die. A substrate is attached to the first die and the further die and has an electrical interconnect pattern that interconnects contacts on the first die with respective contacts on the further die. Features of the interconnect pattern have positions on the substrate with smaller tolerances relative to positions of the contacts on the first die than to positions of the contacts on the further die.
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Gary S. Delp, Patent Application entitled: “Base Platforms with Combined ASIC and FPGA Features and Process of Using Same”, U.S. Appl. No. 11/079,439, filed Mar. 14, 2005, pp. 1-22.
Andujar Leonardo
LSI Logic Corporation
Soderholm Krista
Westman Champlin & Kelly
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