Asymetric layout structures for transistors and methods of...

Details Asymetric layout structures for transistors and methods of... Asymetric layout structures for transistors and methods of...

2007-09-04

2007-09-04

Prenty, Mark V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

C257S401000, C257S773000, C438S179000, C438S286000

Reexamination Certificate

active

10977227

ABSTRACT:
High power transistors are provided. The transistors include a source region, a drain region and a gate contact. The gate contact is positioned between the source region and the drain region. First and second ohmic contacts are provided on the source and drain regions, respectively. The first and second ohmic contacts respectively define a source contact and a drain contact. The source contact and the drain contact have respective first and second widths. The first and second widths are different. Related methods of fabricating transistors are also provided.

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