Associative storage circuit

Communications: electrical – Digital comparator systems

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Details

340173R, 340173FF, G11C 1140

Patent

active

039368114

ABSTRACT:
An associative storage circuit characterized in that a storage cell therefor includes two circuit arms in parallel, each arm having one MNOS storage transistor and one switching transitor connected in series, and that the information which is to be written in, and the comparison information during readout, may be applied to the gates of the switching transistors, the storage transistors in one embodiment having a common gate line; in a second embodiment having individual gate controls for bit-by-bit write-in of information; and in a third embodiment, having a common gate line and a common substrate terminal line with bit-by-bit write-in by means of opposite polarity write-in potentials.

REFERENCES:
patent: 3573756 (1971-04-01), Hillis
patent: 3713115 (1973-01-01), Duben

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