Communications: electrical – Digital comparator systems
Patent
1975-04-24
1976-10-05
Hecker, Stuart N.
Communications: electrical
Digital comparator systems
340173RC, G11C 1500, G11C 2100
Patent
active
039848213
ABSTRACT:
In an associative memory, each cell 20 (FIG. 2) includes a recirculatory shift register 30 in which information is stored, a comparator 31 for comparing the stored information with a key fed on line 22, a gate 32 for passing the results of the comparison only in a key field defined by key field signals on line 23, and a flip-flop 33 which is set to 1 if the comparison fails. Flip-flop 33 controls reading from the cell. A flip-flop 37 is used to record whether the cell is full or empty, and a compare chain 40a, 40b passing through all cells in sequence is energized onwards from the first cell in which comparison is successful.
A further development permits sequential retrieval and searching for the next key above a desired key if the desired key itself is not in the memory.
REFERENCES:
patent: 3742466 (1973-06-01), Hamm et al.
patent: 3845474 (1974-10-01), Lange et al.
Tsui, Associately-Memory Sequencing Arrangement, IBM Technical Disclosure Bulletin, vol. 15, No. 7, 12/72, pp. 2342-2343.
Gardner et al., Subselection in Associative Store, IBM Technical Disclosure Bulletin, vol. 12, No. 11, 4/70, pp. 2038-2039.
8/17/70, ET AL., Associative Memory Chips: fast, Versatile -0 and here., Electronics, 8/17/70, pp. 96-100.
Hecker Stuart N.
Honeywell Information Systems Limited
Prasinos Nicholas
Reiling Ronald T.
White William F.
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