Associative memory device with small memory cells selectively st

Static information storage and retrieval – Associative memories – Ferroelectric cell

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36518907, 36518529, G11C 1500

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054557844

ABSTRACT:
An associative memory cell is implemented by a series combination of two electrically erasable and programmable read only memory transistors inserted in a potential line and complementarily driven by two data lines for making one of the two electrically erasable and programmable read only memory transistors conductive depending upon the logic level of a registration data bit, and the two data lines make both of the two electrically erasable and programmable read only memory transistors conductive for storing a don't-care bit, thereby decreasing the occupation area assigned to the associative memory cell without sacrifice of usability in the associative operation.

REFERENCES:
patent: 4538243 (1985-08-01), Zehner
patent: 5040134 (1991-08-01), Park
"Reviews and Prospects of Functional Memory LSI from the Aspect of Integration Circuit Technologies", Information Processing of Information Processing Society, vol. 32, No. 12, Dec. 1991, pp. 1239-1248.
"An 8-kbit Content Addressasble and Reentrant Memory", IEEE Journal of Solid-State Circuits, vol. SC-20, No. 5, Oct. 1985, pp. 951-957.

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