Associative memory apparatus for searching data in which...

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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C365S189070

Reexamination Certificate

active

07113416

ABSTRACT:
In the present invention, focusing on the point that the number of transistors can be reduced to about ⅖ of that in a prior art due to an absolute-value-of-difference calculating circuit for an associative memory being configured of an addition circuit and a bit inversion circuit. The absolute-value-of-difference calculating circuit is built in a fully-parallel type associative memory as a unit comparison circuit, and all of the outputs of the absolute-value-of-difference calculating circuits for which the number of comparisons thereof are prepared are input to weight comparison circuits, whereby the calculation of the Manhattan distance between the search data and the reference data is carried out. In accordance with the configuration, because a Manhattan distance calculating circuit can be realized by a fewer number of transistors and with a small area, an associative memory apparatus as well can be realized at a low power consumption and with a small area.

REFERENCES:
patent: 6415293 (2002-07-01), Navoni et al.
Compact associative memory architecture with fully parallel search capability for the minimum Hamming distance. IEEE, vol. 37, No. 2, Feb. 2002.
An architecture for compact associative memories with Deca-ns nearest match capability up to large distances. IEEE 2001 International solid state circuits conference, First edition, Feb. 2001.
Fully parallel pattern matching engine with dynamic adaptability to Hamming or Manhattan distance. 2002 Symposium on VLSI circuits, IEEE Cat. No. 02CH37302.
Takahiro Hanyu et al., Multiple-Valued Logic-in-Memory VLSI Architecture Based on Floating-Gate-MOS Pass-Transistor Logic, IEICE Trans. Electron, vol. E82-C, No. 9, Sep. 1999, pp. 1662-1668.

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