Communications: electrical – Digital comparator systems
Patent
1975-10-06
1977-05-10
Curtis, Marshall M.
Communications: electrical
Digital comparator systems
307205, 307238, 340166R, G11C 1102
Patent
active
040231470
ABSTRACT:
For associative operation of a storage circuit, two field-effect transistors form one storage cell, i. e. that together with associated capacitors they store either a 1 or a 0. A word line is connected to one electrode of each field-effect transistor in a storage row. At one end of the word line a sensing amplifier with latch characteristics is arranged so that the information sensed by this circuit is amplified and subsequently latched or stored. For the associative operation of the circuit arrangement, two query lines Q0 and Q1 are provided for a bit position. When only one field-effect transistor with a series-connected capacitor is used, the bits of one bit position of the various words are simultaneously written, and the bit positions are addressed one after the other. For a bit position which is queried by means of a key or an identifier word bit "1" the true value of the bit is applied. For a bit position which is queried by means of a key or an identifier word bit "0" the complement of the bit is applied. Querying is effected in that lines Q of all bit positions to be queried are set to V.sub.n. Only when the key or identifier word and the queried bits concur with each other in full does no signal occur on the word line.
REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3750115 (1973-07-01), Mundy
patent: 3774176 (1973-11-01), Stein et al.
patent: 3909631 (1975-09-01), Kitagawa
Schuenemann Claus
Tsui Frank
Curtis Marshall M.
International Business Machines - Corporation
Limanek Stephen J.
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