ASIC bus structure

Details ASIC bus structure ASIC bus structure

1995-02-17

1996-09-10

Hsu, Alpus H.

Multiplex communications

Wide area network

Packet switching

370 852, 370 8515, 34082505, 327 19, 327391, 327437, H04J 300

Patent

active

055555403

ABSTRACT:
A bi-directional ring bus structure is formed on an integrated circuit from a conductive bus and M X:1 multiplexer modules (where M is an integer .gtoreq.2), coupled in a point-to-point configuration. Each module is associated with an input/output port that can communicate with the bus. Each module has an output port (Dout), and arbitration ("ARB") port, and X input ports ("LOCALout", "Din1", "Din2", . . . "Din[X-1]"). The Dout output port of an M.sub.i module is coupled, via a portion of conductive bus, to [X-1] input ports on an adjacent D.sub.i+1 module. Thus, module M.sub.0 's Dout.sub.0 output port is coupled to [X-1] input ports on module M.sub.1, module M.sub.1 's Dout.sub.1 port is coupled to [X-1] input ports of module M.sub.2, and so forth. The modules are X:1 in that the output port of each module is coupled to a chosen one of that module's X INPUT ports, as determined by the state of an arbitration select signal (ARB) coupled to the module's arbitration port. The state of the arbitration select signals defines a bus signal path between the LOCAL.sub.out input port of a module coupled to the bus, and the D.sub.in input ports of other modules. Because it is point-to-point, low module current may be used, the width of the metallized bus traces may be reduced, and contention-type overlap damage is minimized.

REFERENCES:
patent: 3838296 (1974-09-01), McLeod
patent: 5111455 (1992-05-01), Negus
patent: 5329529 (1994-07-01), Murphy et al.

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