Wave transmission lines and networks – Artificial lines
Reexamination Certificate
2000-06-19
2003-04-29
Pascal, Robert (Department: 2817)
Wave transmission lines and networks
Artificial lines
C333S138000, C333S156000
Reexamination Certificate
active
06556096
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an artificial line, i.e. an artificial electric line, and specifically an artificial line having a constant group delay in a wide frequency range (octave bandwidths). The invention originates from delay lines for radar applications and will partly be described in connection with such applications. However, the invention can be applied in other contexts where an artificial line having the achieved properties can be used. Therefore the inventor aims at protecting the artificial line by a patent, based on its construction and its properties and independently of the place where it is used.
2. Description of the Related Art
Advanced future radar installations will be based on phased array antennas. Since such antennas may have hundreds of modules, monolithic integrated microwave circuits (MMIC) are necessary to minimize size and weight. Most prior-art microwave systems with phased array antennas are provided with binary control devices. In large installations, a great number of control wires will be involved since each element must be controlled individually. If an analog control device could be used, much would be gained since only one control wire or a few control wires would be required.
For installations requiring a great instantaneous bandwidth, phase shifters cannot be used since they cause a change in the beam direction, phase squinting, and distortion of the pulses, pulse stretching. Therefore, the present invention instead uses a special embodiment of a controllable delay element since such elements allow frequency-independent beam steering. Prior-art controllable delay elements are digital, which causes losses. Besides they are expensive.
FIG. 1
shows a prior-art binary 4-bit delay element using single-pole double-throw (SPDT) switches. Single-pole double-throw switches have considerable losses, which means that the prior-art delay element all in all exhibits great losses. If in
FIG. 1
the delay &Dgr;t is 8 ps, the maximum delay will be 120 ps.
SUMMARY OF THE INVENTION
The present invention solves the above problem by providing an artificial line with controllable delay and low losses and at a, relatively seen, low cost by being designed as an artificial line in the form of a two-port network with an essentially frequency-independent mirror impedance, which in a first state comprises two identical inductors of the magnitude L, connected in series and having a mutual inductance M, and a capacitor of the magnitude C
1
over the inductors and a shunt capacitor C
2
to earth, the artificial line being adapted to give the same group delay—the same amount of delay—in a wide frequency range by the element values as a function of the cut-off frequency f
c
and the characteristic impedance Z
0
being selected according to the inductance, mutual inductance and capacitance equations
{
L
[
nH
]
=
107.4
·
10
-
3
Z
0
f
C
[
GHz
]
M
[
nH
]
=
51.72
·
10
-
3
Z
0
f
C
[
GHz
]
C
1
[
pF
]
=
27.85
·
10
-
3
1
Z
0
·
f
C
[
GHz
]
C
2
[
pF
]
=
318.3
·
10
-
3
1
Z
0
·
f
C
[
GHz
]
&AutoLeftMatch;
According to advantageous embodiments of the invention, the artificial line is a self-switched artificial line and can take a second state with a short delay by the capacitor C
1
being replaced by a short-circuit. The capacitor C
1
may be realized as a first switching element (FET
1
,
4
a
) optimized to take, in dependence on its control voltage, two distinct states, a first state corresponding to a capacitance of the value C
1
, which gives the artificial line a long delay, and a second state corresponding to a short-circuit with low impedance, which gives the artificial line a short delay. The first switching element (FET
1
,
4
a
) may be realized as a first field effect transistor. Further, a second switching element (FET
2
,
4
b
) with properties corresponding to those of the first switching element (FET
1
,
4
a
) may be arranged in series with the capacitor C
2
, the second switching element being driven complementarily with the first switching element.
According to the present invention, the artificial line may be made in a planar monolithic circuit technique, where the inductors and the mutual inductance are realized as coupled microstrip lines (
3
), and the short-circuit which is formed in the second state of the circuit comprises the first switching element (FET
1
,
4
a
) and two insulating crossovers (
5
a
,
5
b
) of the microstrip lines and forms the shortest possible transfer path between input (
1
) and output (
2
). The short circuit which is formed in the second state of the circuit may also comprise the first switching element (FET
1
,
4
a
), one of the coupled microstrip lines (
3
b
) and an insulating crossover (
5
) of a microstrip line.
Furthermore, a plurality of artificial lines may be cascade-coupled with a control voltage for the entire composed artificial line being applied to the different artificial lines in series via intermediate impedances R, such that a respective artificial line changes its state in turn as the control voltage increases.
According to a further advantageous embodiment, the artificial line may be a continuously tunable artificial line by the capacitors C
1
and C
2
being designed as varactors, in which a first range within which the group delay GD should be tunable is selected, whereupon this is transferred to a range of the cut-off frequency f
0
according to the equation
GD
(
ω
)
=
2
ω
C
·
1
+
k
Ω
2
(
1
-
k
Ω
2
)
2
+
Ω
2
,
(
equation
17
)
whereupon a cut-off frequency within this range is selected, followed by a choice of L and M at the selected frequency according to the inductance, mutual inductance and capacitance equations defined herein. Capacitances of the varactors are variable, such that the artificial line gives the delay which is intended in each moment, according to equation 17, the calculation occurring via a frequency value obtained from the inductance, mutual inductance and capacitance equations defined herein. In accordance with this embodiment, the artificial line is made in a planar monolithic circuit technique, where the inductors and the mutual inductance are realized as coupled microstrip lines (
3
), the varactor C
1
(C
V1
) consists of a field effect transistor (
4
a
) where the drain and source are inter-connected and the bias for tuning is applied to its gate and the varactor C
2
(C
V2
) consists of a field effect transistor (
4
b
) coupled and biased in a manner corresponding to that of the first-mentioned field effect transistor (
4
a
). Finally, at least one self-switched artificial line may be cascade-coupled to the tunable artificial line.
These together with other objects and advantages which will become subsequently apparent reside in the details of construction and operation as more fully hereinafter described and claimed, reference being had to the accompanying drawings forming a part hereof, wherein like numerals refer to like parts throughout.
REFERENCES:
patent: 4443772 (1984-04-01), Schwarzmann
patent: 4885562 (1989-12-01), Ouvrard et al.
H954; U.S. Statutory Invention Registration; Aug. 6, 1991 Lang et al.
Proceedings of the 33rd Midwest Symposium on Circuits and Systems, Aug. 12-15, 1990.
Carlegrim Börje
Ouacha Aziz
Glenn Kimberly E
Jacobson & Holman PLLC
Pascal Robert
Totalförsvarets Forskningsinstitut
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