Boots – shoes – and leggings
Patent
1990-07-06
1992-03-03
Malzahn, David H.
Boots, shoes, and leggings
G06F 15332
Patent
active
050938010
ABSTRACT:
A modular, arrayable, FFT processor for performing a preselected N-point FFT algorithms. The processor uses an input memory to receive and store data from a plurality of signal-input lines, and to store intermediate butterfly results. At least one Direct Fourier Transformation (DFT) element selectively performs R-point direct Fourier transformations on the stored data according to a the FFT algorithm. Arithmetic logic elements connected in series with the DFT stage perform required phase adjustment multiplications and accumulate complex data and multiplication products for transformation summations. Accumulated products and summations are transferred to the input memory for storage as intermediate butterfly results, or to an output memory for transfer to a plurality of output lines. At least one adjusted twiddle-factor storage element provides phase adjusting twiddle-factor coefficients for implementation of the FFT algorithm. The coefficients are preselected according to a desired size for the Fourier transformation and a relative array position of the arrayable FFT processor in an array of processors. The adjusted twiddle-factor coefficients are those required to compute all mixed power-of-two, power-of-three, power-of-four, and power-of-six FFTs up to a predetermined maximum-size FFT point value for the array which is equal to or greater than N.
REFERENCES:
patent: 4604721 (1986-08-01), Gray
patent: 4689762 (1987-08-01), Thibodeau, Jr.
patent: 4787055 (1988-11-01), Bergeon et al.
patent: 4899301 (1990-02-01), Nishitani et al.
Orndorff Ross M.
White Stanley A.
Hamann H. Fredrick
Malzahn David H.
Montanye George A.
Ogrod Gregory D.
Rockwell International Corporation
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