Array system architecture of multiple parallel structure process

Multiplex communications – Wide area network – Packet switching

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

39580015, 370224, G06F 1340, H04L 1242

Patent

active

058623973

ABSTRACT:
A system of elementary processors in array form organized in accordance with a plurality of nodes with SIMD operation, each having a plurality of elementary processors connected to one another so as to form a ring of elementary processors, each elementary processor being associated with a connection cell connected to the cells of neighbouring elementary processors in order to form a ring network. Each SIMD node is provided with a memory and addressing module ensuring an addressing independence of the node, as well as a control unit connected to the control units of neighbouring nodes in order to form an internode control network in which priority tokens circulate, each memory and addressing module of a node being connected to the memory and addressing module of neighbouring nodes so as to form an internode data network. The system may find one application in the simulation of fluid flows.

REFERENCES:
patent: 4709365 (1987-11-01), Beale et al.
patent: 4942517 (1990-07-01), Cok
patent: 5504918 (1996-04-01), Collette et al.
patent: 5574931 (1996-11-01), Collette et al.
IEEE, vol. 1, pp. 372-375, 1994, Neil R. S. Simons, et al., "Cellular Automata as a New Computational Approach to Modelling Electromagnetic Phenomena".

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Array system architecture of multiple parallel structure process does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Array system architecture of multiple parallel structure process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Array system architecture of multiple parallel structure process will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1255051

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.