Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only
Reexamination Certificate
2002-12-17
2004-09-14
Nguyen, Dung (Department: 2871)
Liquid crystal cells, elements and systems
Particular structure
Having significant detail of cell structure only
C349S038000, C349S043000
Reexamination Certificate
active
06791652
ABSTRACT:
This application claims the benefit of Korean Patent Application No. 2001-84590, filed on Dec. 24, 2001 in Korea, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to an array substrate for In-Plane Switching (IPS) mode liquid crystal display device and fabricating method for the same in order to prevent a break of a data line.
2. Discussion of the Related Art
A typical liquid crystal display (LCD) device uses optical anisotropy and polarization properties of liquid crystal molecules. The liquid crystal molecules have a definite orientation order in alignment resulting from their thin and long shapes. The alignment direction of the liquid crystal molecules can be controlled by supplying an electric field to the liquid crystal molecules. In other words, as the alignment direction of the electric field is changed, the alignment of the liquid crystal molecules also changes. Because incident light is refracted to the orientation of the liquid crystal molecules due to the optical anisotropy of the aligned liquid crystal molecules, image data is displayed.
Active matrix LCDs, in which the thin film transistors and the pixel electrodes are arranged in the form of a matrix, are widely used because of their high resolution and superiority in displaying moving images. An array substrate for the in-plane switching (IPS) mode liquid crystal display (LCD) device and the fabricating method for the same will be described hereinafter with reference to the following figures.
FIG. 1
is a plan view of a pixel of an array substrate for a related art in-plane switching (IPS) mode liquid crystal display (LCD) device. In
FIG. 1
, a plurality of gate lines
12
, common lines
16
and data lines
24
are formed on an array substrate
10
for the related art in-plane switching (IPS) mode liquid crystal display (LCD) device. The common line
16
is spaced apart from the gate line
12
and the data line
24
crosses the gate line
12
and the common line
16
. The data line
24
defines a pixel region “P” by crossing the gate line
12
. A thin film transistor is formed in a crossing point of the gate line
12
and the data line
24
. The thin film transistor includes a gate electrode
14
, an active layer
20
, a source electrode
26
and a drain electrode
28
. The active layer
20
, the source electrode
26
and the drain electrode
28
are formed over the gate electrode
14
. The source electrode
26
communicates with the data line
24
and the gate electrode
14
communicates with the gate line
12
. A pixel electrode
30
and a common electrode
17
are formed in the pixel region “P” in FIG.
1
. The pixel electrode
30
is electrically connected to the drain electrode
28
. The common electrode
17
is formed parallel with the pixel electrode
30
. The pixel electrode
30
includes an extension portion
30
a
, a plurality of vertical portions
30
b
and a horizontal portion
30
c
. The extension portion
30
a
is extended from the drain electrode
28
and the plurality of the vertical portions
30
b
is vertically extended from the extension portion
30
a
. The vertical portions
30
b
are spaced from each other. The horizontal portion
30
c
connects the vertical portions
30
b
into one portion. The common electrode
17
includes a plurality of vertical portions
17
b
and a horizontal portion
17
a
. The vertical portions
17
b
are vertically extended from the common line
16
and arranged in an alternating order with the vertical portions
30
b
of the pixel electrode
30
. The horizontal portion
17
a
connects the plurality of the vertical portions
17
b
into one portion. The vertical portion
17
b
of the common electrode
17
is spaced apart from the data line
24
. A transparent electrode pattern
36
contacts the horizontal portion
30
c
of the pixel electrode
30
through a contact hole
34
. The transparent electrode pattern
36
is formed over the gate line
12
adjacent to the common line
16
and extended to the gate line
12
. An auxiliary storage capacitor “C” is formed over the gate line
12
and the common line
16
and forms a dual storage capacitor structure. A line width W
2
of the data line
24
in a portion where the data line
24
crosses the gate line
12
and the common line
16
is narrower than a line width W
1
of the data line
24
in other areas. The reason is to minimize a fluctuation of the storage capacitance by reducing an overlapped area between the data line
24
and the gate line
12
and between the data line
24
and the common line
16
. However, the line width W
2
of the data line
24
, which is patterned in a crossing portion “K” cannot overcome a step difference in the crossing portion “K”. Accordingly, the data line
24
may be severed owing to the step difference in the crossing portion “K”.
FIG. 2
is a microphotograph of “K” portion of
FIG. 1
illustrating a severing of the data line in a crossing portion between the data line
24
and the common line
16
. The microphotograph illustrates that the data line
24
is severed in the crossing portion “K” between the data line and the common line because the data line
24
cannot overcome the step difference between the data line
24
and the common line
16
. The array substrate
10
that has a served data line
24
is not available and this subsequently decreases a manufacturing yield.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to an array substrate for in-plane switching (IPS) mode liquid crystal display (LCD) device and method for fabricating the same that substantially obviates one or more of problems due to limitations and disadvantages of the related art.
An advantage of the present invention is to provide the array substrate for in-plane switching (IPS) mode liquid crystal display (LCD) device in order to prevent a data line from being severed owing to a step difference between the data line and a common line.
Another advantage of the present invention is to provide a fabricating method for the array substrate for in-plane switching (IPS) mode liquid crystal display (LCD) device in order to prevent a data line from being severed owing to a step difference between the data line and a common line.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an array substrate for in-plane switching (IPS) mode liquid crystal display (LCD) device comprises a substrate including a plurality of pixel regions; a plurality of gate lines and a plurality of common lines in a horizontal direction; a plurality of data lines crossing the gate line and the common line, the data line in a crossing portion between the data line and the gate line and between the data line and the common line having a substantially same line width as the data line; a thin film transistor at a crossing point of the gate and data lines; a pixel electrode having an extension portion, a plurality of vertical portions and a horizontal portion; a common electrode having a plurality of vertical portions and a horizontal portion; and a transparent electrode pattern covering the horizontal portion of the pixel electrode. The gate line and the common line are formed on a same layer using the same material. The gate line and the common line include one of aluminum (Al), aluminum alloy (Al alloy), tungsten (W), molybdenum (Mo) and chromium (Cr). The common line and the horizontal portion of the pixel electrode have an interposed insulation layer and f
Do Myung Ho
Yang Yun Suk
LG Philips LCD Co., Ltd.
McKenna Long & Aldridge LLP
Nguyen Dung
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