Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2002-07-29
2004-06-22
Chowdhury, Tarifur R. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S113000, C349S114000, C349S140000
Reexamination Certificate
active
06753934
ABSTRACT:
This application claims the benefit of Korean Patent Application No. 2001-45799, filed on Jul. 30, 2001, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly to a transflective LCD device including a poly crystalline silicon (p-Si) thin film transistor (TFT).
2. Discussion of the Related Art
In general, transflective LCD devices function as both transmissive and reflective LCD devices at the same time. The transflective LCD devices can use light of a backlight and ambient light of natural or artificial light source and thus do not depend on environmental conditions. Therefore, power consumption of the transflective LCD device is reduced. Accordingly, the transflective LCD devices are currently the subject of research and development.
FIG. 1
is a schematic plan view of an array substrate for a conventional transmissive LCD device.
In
FIG. 1
, a gate line
6
, a storage line
7
and a data line
10
are formed on an array substrate
2
. The gate line
6
includes a gate pad
4
at its one end. The storage line
7
is parallel to the gate line
6
. The data line
10
including a data pad
8
at its one end crosses the gate line
6
and the storage line
7
. The data line
10
defines a pixel region “P” with the gate line
6
. A transparent pixel electrode
18
is formed at the pixel region “P”. A signal is applied to a gate pad terminal
5
contacting the gate pad
4
through a gate pad contact hole
32
and a data pad terminal
9
contacting the data pad
8
through a data pad contact hole
34
from exterior. A thin film transistor (TFT) “T” having a gate electrode
12
, an active layer
17
, and source and drain electrodes
14
and
16
is formed near a crossing point of the gate and data lines
6
and
10
. The TFT “T” has a coplanar structure in which source and drain regions are formed in the same plane as the active layer
17
. The active layer
17
is made of poly crystalline silicon. The pixel electrode
18
is connected to the drain electrode
16
through a drain contact hole
28
. The gate electrode
12
and the source electrode
14
are connected to the gate line
6
and the data line
10
, respectively. A storage capacitor “C” including the storage line
7
is formed at a portion of the pixel region “P”. The storage capacitor “C” also includes a metal layer
15
of island shape connected to the pixel electrode
18
through a storage contact hole
30
. Charges are thereby stored in the storage line
7
and the metal layer
15
.
FIG. 2
is a schematic cross-sectional view taken along a line II—II of FIG.
1
.
In
FIG. 2
, a buffer layer
20
, namely, a first insulating layer is formed on a substrate
2
and a semiconductor layer
17
of island shape is formed on the buffer layer
20
. A center portion of the semiconductor layer
17
is a first active region
17
a
functioning as an active channel, and edge regions of the semiconductor layer
17
are second active regions
17
b
and
17
c
doped with impurities a subsequent process. Next, a gate insulating layer
22
, namely, a second insulating layer is formed on the semiconductor layer
17
. Next, a gate electrode
12
, a gate line
6
and a gate pad
4
of conductive metallic material are formed on the gate insulating layer
22
. The gate line
6
extends along a first direction and is connected to the gate electrode
12
formed over the semiconductor layer
17
. The gate pad
4
is disposed at one end of the gate line
6
. A storage line
7
extends along the first direction and is parallel to the gate line
6
. The second active regions
17
b
and
17
c
are doped with impurities by using the gate electrode
12
as a doping mask. After forming an interlayer insulator
24
, namely, a third insulating layer on an entire surface of the substrate
2
, the second active regions
17
b
and
17
c
are exposed by patterning the interlayer insulating layer
24
and the gate insulating layer
22
. Next, a source electrode
14
, a drain electrode
16
, a storage electrode
15
, a data line
10
and a data pad
8
are formed through depositing and patterning conductive metallic material. The source and drain electrodes
14
and
16
are connected to the second active regions
17
b
and
17
c
. The data pad
8
is disposed at one end of the data line
10
extending along a second direction and connected to the source electrode
14
. Next, a passivation layer
26
, namely, a fourth insulating layer having a drain contact hole
28
, a storage contact hole
30
, a gate pad contact hole
28
and a data pad contact hole
34
is formed through depositing and patterning transparent organic material. The drain electrode
16
, the storage electrode
15
, the gate pad
4
and the data pad
8
are exposed through the drain contact hole
28
, the storage contact hole
30
, the gate pad contact hole
28
and the data pad contact hole
34
, respectively. Next, a pixel electrode
18
contacting the drain electrode
16
, a gate pad terminal
5
contacting the gate pad
4
and a data pad terminal
9
contacting the data pad
8
are formed on the passivation layer
26
through depositing and patterning transparent conductive material.
The conventional transmissive LCD devices, however, have high power consumption due to a limitation of the light source. To overcome this problem, transflective LCD devices have been developed.
FIG. 3
is a schematic cross-sectional view of an array substrate for a conventional transflective LCD device.
In
FIG. 3
, an array substrate
30
for a transflective LCD device has substantially same structure as that for a transmissive LCD device except a pixel electrode
63
and a reflective electrode
72
at a pixel region “P”. That is, a gate line
41
and a data line
54
of matrix type are formed on the substrate
30
, and a TFT “T” is formed near a crossing point of the gate and data lines
41
and
54
. The TFT “T” of coplanar structure is a p-Si TFT having an active layer made of poly crystalline silicon. Gate and data pads
44
and
56
to which a signal is applied are formed at one end of the gate and data lines
41
and
54
, respectively. Further, gate and data pad terminals
64
and
66
of transparent conductive material are connected to the gate and data pads
44
and
56
, respectively. The TFT “T” includes an active layer
36
, a gate electrode
40
, source and drain electrodes
50
and
52
. The active layer
36
includes an active extension portion
37
at the pixel region “P”. A storage line
42
of the same material as the gate line
41
is formed along a first direction and crosses the pixel region “P”. Further, the storage line
42
includes a storage electrode
43
at the pixel region “P”. A transparent pixel electrode
63
is connected to the drain electrode
52
through a first drain contact hole
62
. A reflective electrode
72
connected to the pixel electrode
63
through a second drain contact hole
70
is formed over the storage electrode
43
.
Therefore, a storage capacitor portion “C” and a reflective portion “E” are formed at the same portion of the pixel region “P”. Here, the storage capacitor portion “C” includes a first storage capacitor between the active extension portion
37
and the storage electrode
43
, and a second storage capacitor between the storage electrode
43
and the pixel electrode
63
. Since the reflective electrode
72
covers the storage electrode
43
, the reflective portion “E” also covers the storage capacitor portion “C”. The other portion of the pixel region “P” not including the reflective portion “E” is a transmissive portion “F”.
In the array substrate for the conventional transflective LCD device, the reflective electrode is formed over the pixel electrode with an insulating layer interposed therebetween and connected to the pixel electrode through the second drain contact hole. As a result, the fabricating process has many steps and the production cost is high.
SUMMARY OF
Ha Yong Min
Park Jae-Deok
Caley Michael H.
Chowdhury Tarifur R.
LG.Philips LCD Co. , Ltd.
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