Boots – shoes – and leggings
Patent
1979-11-15
1981-11-03
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 938
Patent
active
042989361
ABSTRACT:
In an Array Processor, a buffering unit including a FIFO buffer and serial-to-parallel converter, is interposed between a control processor and the remainder of the Array Processing circuitry so as to permit the utilization of a vertical instruction set for generating addresses and function numbers which are then serially coupled from the control processor to the buffering unit.
REFERENCES:
patent: 3875391 (1975-04-01), Shapiro et al.
patent: 3949379 (1976-04-01), Ball
patent: 4025771 (1977-05-01), Lynch, Jr. et al.
patent: 4187539 (1980-02-01), Eaton
patent: 4225920 (1980-09-01), Stokes
patent: 4228487 (1980-10-01), Gupta et al.
Analogic Corporation
Zache Raulfe B.
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