Array processing system with each processor including router and

Details Array processing system with each processor including router and Array processing system with each processor including router and

1995-08-16

1998-09-01

Coleman, Eric

39580018, G06F 1580, G06F 1582

Patent

active

058023852

ABSTRACT:
In one aspect, the invention provides parallel processing apparatus comprising an array of data processors 4. arranged to operate synchronously, and a plurality of data buses. Each data processor 4 has first and second I/O means 16H, 16V for transfer of data between the processor 4 and respective data buses H,V a plurality of processors 4 being connected to each of the data buses H,V and each processor 4 being connected, via said I/O means 16H, 16V, to a different pair of data buses H,V. Each processor 4 includes selectively operable routing means 32H, 32V for interconnecting the first and second I/O means 16H, 16V to transfer data between the buses H,V connected thereto.

REFERENCES:
patent: 3984819 (1976-10-01), Anderson
patent: 5408646 (1995-04-01), Olnowich
patent: 5421019 (1995-05-01), Holsztynski
patent: 5437049 (1995-07-01), Carlstedt
patent: 5574849 (1996-11-01), Sonnier
patent: 5613136 (1997-03-01), Cassavant

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