Array design using a four state cell for double density

Details Array design using a four state cell for double density Array design using a four state cell for double density

1981-11-03

1984-07-24

Stellar, George G.

Static information storage and retrieval

Read only systems

Semiconductive

365 45, G11C 1136, G11C 1706

Patent

active

044620888

ABSTRACT:
A bipolar ROM (read only memory) or ROS (read only storage) system in which the array devices embody four different, two-terminal, device forms: low barrier Schottky diodes; standard or high barrier, Schottky diodes; junction diodes; and no diodes; thereby to make possible four levels of storage for each cell. This effectively doubles the information content for an array with litle increase in the array size.

REFERENCES:
patent: 3423646 (1969-01-01), Cubert et al.
patent: 3484762 (1969-12-01), Meier
patent: 3656117 (1972-04-01), Maley et al.
patent: 3818724 (1974-06-01), Bourgeois
patent: 4174521 (1979-11-01), Neale
patent: 4202044 (1980-05-01), Beilstein, Jr. et al.
1980 IEEE International Solid-State Circuits Conference, Feb. 14, 1980, p. 108, A Numeric Data Processor, R. Nave et al.
1981 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, Feb. 19, 1981, pp. 116-117, The Interface Processor for the 32b Computer, J. Bayliss et al.

Affiliated with

Also associated with

Rating

Array design using a four state cell for double density does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Array design using a four state cell for double density, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Array design using a four state cell for double density will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-100010