Array capacitor with resistive structure

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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Details

C257S723000, C257SE27025, C257SE27045, C257SE23057

Reexamination Certificate

active

07365428

ABSTRACT:
An apparatus comprises a first plurality of contacts disposed on a first side of the apparatus, adapted to engage with a first corresponding plurality of contacts on an external integrated circuit package. The apparatus further comprises a plurality of capacitive storage structures selectively coupled to the first plurality of contacts, one or more traces, and a second plurality of contacts disposed on the first side. The second plurality of contacts are adapted to engage with a second corresponding plurality of contacts on the external integrated circuit package, wherein at least two of the second plurality of contacts are adapted to be coupled to at least a first trace of the one or more traces to form a first resistive structure.

REFERENCES:
patent: 6021050 (2000-02-01), Ehman et al.
patent: 6218729 (2001-04-01), Zavrel, Jr. et al.
patent: 6274937 (2001-08-01), Ahn et al.
patent: 6535398 (2003-03-01), Moresco
patent: 6657275 (2003-12-01), Chung et al.
patent: 6714422 (2004-03-01), Okubora et al.
patent: 2004/0178508 (2004-09-01), Nishimura et al.
Beattie et al., “IC Analyses Including Extracted Inductance Models,” ACM, Inc., 1999, 6 pgs.
Li et al., “Distributed Models for Multi-Terminal Capacitors—Using 2D Lossy Transmission-Line Approach,” IEEE, Electronic Components and Technology Conference, 2001, 4 pgs.
“Electrical Performance of Packages,” National Semiconductor Corporation, www.national.com, 2002, 6 pgs.

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