Arrangement with p-doped and n-doped semiconductor layers...

Details Arrangement with p-doped and n-doped semiconductor layers... Arrangement with p-doped and n-doped semiconductor layers...

2007-01-30

2007-01-30

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Tunneling pn junction device

Reverse bias tunneling structure

C257S603000

Reexamination Certificate

active

10070521

ABSTRACT:
An arrangement having p-doped semiconductor layers and n-doped semiconductor layers which exhibits transitions between the p-doped semiconductor layers and n-doped semiconductor layers, the transitions displaying a Zener breakdown upon application of a voltage characteristic of a transition, a plurality of transitions between p-doped semiconductor layers and n-doped semiconductor layers being present, and the characteristic voltages additively make up the breakdown voltage of the entire arrangement. Also described is a method for manufacturing the arrangement.

REFERENCES:
patent: 3015762 (1962-01-01), Shockley
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patent: 4200877 (1980-04-01), Ogawa et al.
patent: 4554568 (1985-11-01), Champon et al.
patent: 5973359 (1999-10-01), Kobayashi et al.
patent: 58 021 374 (1983-02-01), None
patent: 03 195 054 (1991-08-01), None

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