Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Reexamination Certificate
2006-10-10
2006-10-10
Ngô, Ngân V. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
C257S208000, C257S210000, C257S211000, C257SE27108
Reexamination Certificate
active
07119383
ABSTRACT:
A semiconductor integrated circuit effectively makes use of wiring channels of wiring formed by a damascene method. When first cells are used, since the M1 power source lines are laid out at positions spaced away from a boundary between the cells, the power source lines are not combined in laying out a semiconductor integrated circuit. As a result, the width of the power source lines is not changed. Accordingly, an interval between the line and a line which is arranged close to the line, determined in response to a line width of the lines, can satisfy a design rule; and, hence, the reduction of the wiring channels can be obviated, whereby the supply rate of the wiring channels can be enhanced, and, further, the integrity of a semiconductor chip can be enhanced.
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Ohayashi Masayuki
Yokoi Takashi
Antonelli, Terry Stout and Kraus, LLP.
Ngo Ngan V.
Renesas Technology Corp.
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