Arrangement of vias in a substrate to support a ball grid array

Details Arrangement of vias in a substrate to support a ball grid array Arrangement of vias in a substrate to support a ball grid array

2006-06-13

2006-06-13

Zarneke, David A. (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

Reexamination Certificate

active

07061116

ABSTRACT:
An arrangement of pads with selective via in pad for mounting a semiconductor package on a substrate. In order to strengthen the soldered bonds, standard pads, which have a stronger bond, are used in locations of greatest stress and deflection. Vias in pad (VIP) are used at all other locations to improve routing advantages due to their smaller surface area.

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patent: 6282782 (2001-09-01), Biunno et al.
patent: 1 001 462 (2000-05-01), None

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