Arrangement of controlling memory access requests to grouped mem

Details Arrangement of controlling memory access requests to grouped mem Arrangement of controlling memory access requests to grouped mem

1990-10-31

1994-05-17

Fleming, Michael R.

Boots, shoes, and leggings

3642384, 3642544, 364DIG1, 36492692, 3649572, 3649663, 364DIG2, G06F 1200

Patent

active

053136039

ABSTRACT:
A plurality of banks is divided into a plurality of bank groups and a pair of read and write data control registers is assigned to each of the bank groups. A memory main controller is operatively coupled to the bank groups and controls read/write operations of the banks. The memory main controller receives bank access requests from a system controller and generates a request rejected signal in the event that a bank access request consecutively occurs in connection with one bank group. Thus, application of two successive data to each of the read and write data control registers with the same bank group is prohibited, and erroneous data storage in the above-mentioned data control registers is prevented.

REFERENCES:
patent: 4435765 (1984-03-01), Uchida et al.
patent: 4866603 (1989-09-01), Chiba
patent: 4903197 (1990-02-01), Wallace et al.
patent: 4924375 (1990-05-01), Fung et al.

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