Arrangement having multilevel wiring structure used for electron

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

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257724, 257758, H01L 3902

Patent

active

054752647

ABSTRACT:
According to this invention, there is provided a multilevel wiring substrate comprising, a base substrate having first and second surface and including first and second areas, said first area including first and second level conductive layers insulated from each other, a plurality of first vertical conductive layers electrically connected to said first level conductive layer so as to provide first end portions exposed to said first surface, and a plurality of second vertical conductive layers electrically connected to said second level conductive layer so as to provide second end portions exposed to said first surface, said first and second end portions being alternately arranged in row and column directions, and said second area including third and fourth conductive layers.

REFERENCES:
patent: 4721831 (1988-01-01), Vora
patent: 4954877 (1990-09-01), Nakanishi et al.
"A Comparison of Thin Film, Thick Film, And Co-Fired High Density Ceramic Multilayer With The Combined Technology: T&T HDCM (Thin Film and Thick Film High Density Ceramic Module)", Terasawa et al., Proceedings of ISHM, pp. 607-615 (1983).

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