Arrangement for the summation of products of signals

Details Arrangement for the summation of products of signals Arrangement for the summation of products of signals

1997-06-02

1998-04-28

Gaffin, Jeffrey A.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341141, 341159, 341131, H03M 300

Patent

active

057450633

ABSTRACT:
signal input of a sigma-delta modulator operated at a first clock frequency (1/T.sub.S) the output of which is connected to at least one of two signal inputs of a multiplication/addition element (3). The arrangement is used for example in electricity counters and makes it possible to calculate sums of products by means of simple shift and algebraic adding operations while maintaining closely the precision achievable with a classic multiplication. The arrangement is especially advantageous if the multiplications are done on a semiconductor chip.

REFERENCES:
patent: 5073777 (1991-12-01), Fukuhara et al.
patent: 5148167 (1992-09-01), Ribner
patent: 5208594 (1993-05-01), Yamazaki
patent: 5363101 (1994-11-01), Ueki
patent: 5528240 (1996-06-01), Wilson et al.
Technisches Messen 59 (1992), vol. 1, 2, 6 and 7/8, pp. 262 to 268, entitled "Anwordung von Oversampling-Verfahren zur Erhohung der Aflosung digital erfasster Signale," by M. Barmettler and P. Gruber, R. Oldenbourg publishers.
"A Programmable Mixed-Signal ASIC for Power Metering", IEEE Journal of Solid State Circuits, vol. 26, No. 12, Dec., 1991, by L. Garverick, K. Fujino, D. Mcgrath and R. Baertsch, pp. 2008-2015.

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