Arrangement for the generating of pulse trains for charge-couple

Details Arrangement for the generating of pulse trains for charge-couple Arrangement for the generating of pulse trains for charge-couple

1974-12-30

1976-10-19

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 37, 328 43, 307262, H03K 2100, H04B 100

Patent

active

039873137

ABSTRACT:
An arrangement for generating pulse trains for charged-coupled circuits employs a plurality of series-connected master-slave JK flip-flop circuits in which a Q output of a flip-flop circuit is connected to a J input of the following flip-flop circuit and in which a terminal for obtaining the generated timing pulses is provided at each Q output of a flip-flop circuit. A pulse train input for providing timing pulses to the flip-flop circuits and for each flip-flop circuit an NAND gate is provided whose output is connected to the clear input of the flip-flop circuit. One input of the NAND gate is connected to the timing pulse input line and another input is connected to a Q output of the following flip-flop circuit, except for the last flip-flop circuit in which the other input of the NAND gate associated therewith is connected to the Q output of the first flip-flop circuit. The K inputs of the flip-flop circuits are connected to a fixed potential, preferably a common connection to ground, and the individual flip-flop circuits may be additionally set by way of the clear inputs. In one embodiment the arrangement is constructed for two-phase operation and in another embodiment the arrangement is constructed for three-phase operation.

REFERENCES:
patent: 3471790 (1969-10-01), Kaps
patent: 3518552 (1970-06-01), Carlow
patent: 3541356 (1970-11-01), Lagemann
patent: 3745535 (1973-07-01), DeKoe et al.
patent: 3786276 (1974-01-01), Rosch

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