Arrangement for testing a gate oxide

Details Arrangement for testing a gate oxide Arrangement for testing a gate oxide

1996-03-27

1998-06-23

Brown, Glenn W.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324537, 324763, G01R 3126

Patent

active

057709475

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The invention relates to an arrangement for testing a gate oxide of a power component in accordance with MOS technology integrated into a monolithic integrated circuit.
Integrated circuits, which are combined with a power MOS end stage and which are housed in a single monocrystalline semiconductor body made of silicon, are already known. Since it is possible in the course of future applications that the blocking ability of the gate oxide of the power MOS end stage can decrease because of aging processes, it is necessary to test the gate oxide. Testing of the gate oxide is performed in that a voltage, which is higher than those which will occur in later applications, is applied to the gate oxide. Gate oxides of approximately 50 nanometers are customarily employed. These gate oxides have an intrinsic breakdown at a voltage of approximately 45 Volt. This means that with higher voltages an electrical breakdown would take place, which would result in field failures and thus in the destruction of the power MOS end stage. In applications the gate voltage is limited to U.sub.G less than/equal to 15 Volt. If these gates are now tested by means of a gate voltage of U.sub.G =25 Volt it is accomplished that only those power MOS end stages are recognized as dependable, in which weak points do not result in field failures, as long as the blocking capability does not decrease by more than 10 Volt during their service life.
This manner of proceeding with a test is easily possible in connection with discrete power MOS components, since the gate is directly accessible as measuring pad. During wafer measurements it is thus possible to test the gate oxide for blocking capability directly by means of a higher voltage than would occur later during their employment. However, the mentioned test is not possible with monolithic integrated circuits with integrated power MOS components, because the gate of the power MOS element is disposed inside the chip and is not freely accessible for measurements by means of excess voltage. Measuring the entire integrated circuit with excess voltage would lead to the destruction of the further components of the integrated circuit. These could be, for example, the protective structures of the power MOS components used as excess voltage protection in particular, for example Zener diodes.
It is furthermore already known to perform a gate oxide test in connection with integrated circuits in such a way that the gate oxide quality is judged with the aid of test structures. However, it is disadvantageous in this connection that it is necessary to additionally provide a large surface on the wafers which is subjected to a test in place of the integrated gate oxides. However, this measurement by means of test structures is not economically useful, since too large a surface on the wafer is required for a statistically based statement of the gate oxide quality.


SUMMARY OF THE INVENTION

In contrast to this, the arrangement for testing a gate oxide with the features of the invention has the advantage that, on the one hand, a gate oxide test can be performed with a sufficiently high test voltage without the other components disposed in the integrated circuit being excessively stressed and that, on the other hand, it is possible to do without the additional disposition of test structures on the corresponding wafer. Because a series circuit consisting of a first measuring pad, a resistor and a second measuring pad is disposed between the gate oxide of the power component and the integrated circuit, an appropriately high gate test voltage can be applied to the first measuring pad, while an application or operating voltage can be applied to the second measuring pad, and the difference between the gate measuring voltage and the application voltage is absorbed by the resistor. By means of this it is achieved in a simple manner that the gate oxide of the power MOS end stage can be tested by means of a sufficiently high test voltage which-as already mentioned-assures that no weak points,

REFERENCES:
patent: 4743841 (1988-05-01), Takeuchi
patent: 4853628 (1989-08-01), Gouldsberry et al.
patent: 5068604 (1991-11-01), Van De Lagemaat
patent: 5561373 (1996-10-01), Itoh
patent: 5654863 (1997-08-01), Davies

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