Arrangement for rule decoding and evaluation for a high-resoluti

Details Arrangement for rule decoding and evaluation for a high-resoluti Arrangement for rule decoding and evaluation for a high-resoluti

1996-03-19

1997-12-30

Hafiz, Tariq R.

395 61, 395900, G06G 700

Patent

active

057040109

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The present invention is directed to an arrangement for conducting rule decoding and evaluation in a high-resolution fuzzy inference processor.


DESCRIPTION OF THE PRIOR ART

In the case of fuzzy inference processors having a resolution of, for example, 8 bits, values for the membership functions of the input variables can still be stored without difficulty in a memory. In the case of a resolution of the input variables of more than 8 bits, for example for 10-16 bits, the values of the membership functions of the input variables have to be calculated in the fuzzification circuit from a few corner data, for reasons of storage space. If, because the chip area has to be minimized, there is only a single fuzzification circuit in the fuzzy inference processor, all the input variables have to be calculated there chronologically one after another.


SUMMARY OF THE INVENTION

It is an object of the preceding invention to an arrangement for rule decoding and evaluation which is suitable for a fuzzy inference processor which is optimum from the point of view of processing speed and chip area, which processes input variables chronologically one after another and in which rule decoding and rule evaluation can be carried out largely in parallel with the fuzzification.
The above object is achieved in accordance with the principles of the present invention in an arrangement for rule decoding and evaluation in a fuzzy inference processor, wherein the processor includes a fuzzification unit, a knowledge base memory, and a defuzzification unit, and wherein the inventive arrangement includes a rule decoder, a rule evaluation unit and a unit for forming selection signals. From the fuzzification unit, a minimum number associated with a linguistic value for a given input value is supplied both to the rule decoder and to the unit for forming selection signals. The fuzzification unit also supplies a maximum number of a further linguistic value for the input variable in question to the rule decoder. The fuzzification unit also supplies, to the rule evaluation unit, values of membership functions of linguistic values whose numbers lie in a closed interval between the aforementioned minimum and maximum numbers. The knowledge base memory supplies numbers for linguistic values for the input variable in question, prescribed by a plurality of rules, to the rule decoder as well as to the unit for forming selection signals. In each case, numbers from the plurality of rules are combined into a rule word, and for each input variable, a dedicated signal block with the rule word for that input variable is generated.
In rule decoder, for a given input variable and for the plurality of rules employed, hit signals are generated identifying whether, and if so which of, the rules are fulfilled with regard to the input variable in question. These hit signals are supplied to the unit for forming selection signals. Additionally, the rule decoder, if necessary, generates a mask signal identifying that an input variable does not occur in a rule, and these mask signals are supplied directly from the rule decoder to the rule evaluation unit. The unit for forming selection signals emits selection signals for a given variable formed dependent on the hit signals, the aforementioned minimum and maximum numbers (which are supplied to the unit for forming selection signals from the fuzzification unit), and the aforementioned numbers for linguistic values (supplied to the unit for question to the rule decoder. The fuzzification unit also supplies, to the rule evaluation unit, values of membership functions of linguistic values whose numbers lie in a closed interval between the aforementioned minimum and maximum numbers. The knowledge base memory supplies numbers for linguistic values for the input variable in question, prescribed by a plurality of rules, to the rule decoder as well as to the unit for forming selection signals. In each case, numbers from the plurality of rules are combined into a rule word, and for each input variable, a

REFERENCES:
patent: 5142664 (1992-08-01), Zhang
patent: 5371832 (1994-12-01), Eichfeld et al.
patent: 5412752 (1995-05-01), Basehore et al.
"Architecture of a CMOS Fuzzy Logic Controller With Optimized Memory Organization and Operator Design," Eichfeld et al., IEEE Int. Conf. on Fuzzy Systems, Mar. 8-12, 1992, pp. 1317-1323.
"A Fuzzy Inference Coprocessor Using a Flexible Active-Rule-Driven Architecture," Ikeda et al., IEEE Int. Conf. on Fuzzy Systems, Mar. 8-12, 1992, San Diego, CA, pp. 537-544.
Ikeda et al. "A Fuzzy Ingerence Coprocessor Using a Flexible Active-Rule-Driven Architecture" IEEE International Conference on Fuzzy Systems. San Diego, CA pp. 537-544, Mar. 1992.

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