Arrangement for reducing interference in tuned circuits in integ

Details Arrangement for reducing interference in tuned circuits in integ Arrangement for reducing interference in tuned circuits in integ

1994-12-01

1998-12-15

Le, Thanh Cong

Telecommunications

Receiver or analog modulated signal frequency converter

Frequency modifying or conversion

455318, 455323, H04B 126

Patent

active

058505954

ABSTRACT:
An arrangement for reducing interference in tuned circuits in integrated circuits as a result of the reception and transmission of high frequencies. An external tuned circuit is integrated in the integrated circuit and the interference which is otherwise produced by the connecting pins is eliminated.

REFERENCES:
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patent: 4331940 (1982-05-01), Uwano
patent: 5061907 (1991-10-01), Rasmussen
patent: 5063360 (1991-11-01), Sigmon
patent: 5266963 (1993-11-01), Carter
patent: 5305186 (1994-04-01), Appelt et al.
patent: 5384557 (1995-01-01), Yosida
patent: 5428837 (1995-06-01), Bayruns et al.
A 50 GHz GaAs FET MIC Transmitter/Receiver Using Hermetic Miniature Probe Transistions, IEEE Transitions, IEEE Transactions No. 9, Sep. 1989.
A Highly-Stable 36 GHz GaAs FET DRO with Phase-Lock Capability--Microwave Journal, Jul. 1989.
On the Design of a Voltage-Tuned Push-Push Dielectric Resonator Oscillator--Microwave Journal Jun. 1990.
MMIC: On-Chip Turnability--Microwave Journal Apr. 1987.

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