Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Patent
1995-10-27
1997-12-23
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
257679, 257531, H01L 2348, H01L 2352, H01L 2940
Patent
active
057010374
ABSTRACT:
In an arrangement for signal transmission between chip layers of a vertically integrated circuit, a defined, inductive signal transmission ensues between a part of the vertically integrated circuit in one chip layer and a further part of the vertically integrated circuit in a further chip layer by means of a coupling inductance formed by respective coils in the two layers. Particularly given high connection densities, a large number of freely placeable and reliable vertical signal connections can be produced directly from the inside of one chip layer to the inside of a neighboring chip layer without extremely high demands being made on the adjustment of the chip layers relative to one another and on the surface planarity of the individual chip layers.
REFERENCES:
patent: 4960983 (1990-10-01), Inoue
patent: 5424527 (1995-06-01), Takahira
P. Horowitz & W. Hill The Art of Electronics Cambridge 1989.
"The 3D Interconnection--Application for Mass Memories and Microprocessors," Val et al., Proc. of the 1991 Int. Symp. on Microelectronics, pp. 62-68.
"Future WSI Technology: Stacked Monolithic WSI," Williams et al., IEEE Trans. on Comp., Hybrids, and Mfg. Tech., vol. 16, No. 7, Nov., 1993, pp. 610-614.
Kleiner Michael
Kuehn Stefan
Thewes Roland
Weber Werner
Crane Sara W.
Siemens Aktiengesellschaft
Wille Douglas A.
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