Arrangement for high speed testing of field-effect transistors a

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor

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324158R, 365201, G01R 3128

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active

051666081

ABSTRACT:
A testing circuit for testing field-effect transistors of, for example, a random access memory includes weak N-channel pull-down field-effect transistors and weak P-channel pull-up field-effect transistors for testing field-effect transistors of opposite type to be tested. The weak field-effect transistors are placed in series with the opposite type of field-effect transistors. When the series coupled field-effect transistors are turned on, the voltage at the common node of the field-effect transistors is sensed to determine whether the common node is pulled-up or pulled-down in potential to indicate whether a field-effect transistor under test is functional.

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"Circuit for Facilitating the Testing of Semiconductor Chips Mounted on a Module", by Abilevitz et al., IBM Tech. Disc. Bull., vol. 22, #2, pp. 1018-1021, Aug. 1979.

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