Arrangement for generating a clock signal for a sigma-delta...

Coded data generation or conversion – Sample and hold

Reexamination Certificate

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C327S291000, C327S114000

Reexamination Certificate

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07049987

ABSTRACT:
In a method for generating a scanning clock signal (S) for scanning an analog signal (Ua) for an analog-to-digital converter (20) operating according to the sigma-delta method, a variable period (T; T*) of the power supply system (PL) is ascertained in time units of a system clock signal (C), and the scanning clock signal (S) is generated by distributing a constant number K of pulses over the ascertained period (T; T*), so that the frequency of the scanning clock signal (S) is an integer multiple of the frequency of the power supply system (PL). The method is essentially able to be carried out by an accumulator unit (4) connected to a counter (3) and makes possible the advantage that during the analog-to-digital conversion a mains hum contained in the analog signal (Ua) is suppressed.

REFERENCES:
patent: 4685614 (1987-08-01), Levine
patent: 4868573 (1989-09-01), Wittmer
patent: 4993052 (1991-02-01), Hammelsbacher
patent: 5349352 (1994-09-01), Saleh
patent: 5617090 (1997-04-01), Ma et al.
patent: 6169506 (2001-01-01), Oprescu et al.
patent: 6259291 (2001-07-01), Huang

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