Arrangement for DPCM coding of television signals with fast sign

Details Arrangement for DPCM coding of television signals with fast sign Arrangement for DPCM coding of television signals with fast sign

1988-03-31

1989-09-12

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358136, H04N 713

Patent

active

048665185

ABSTRACT:
In DPCM coders, respective estimated values are subtracted from digitized picture element signals and the estimated errors are employed for signal transmission following quantization and coding. Each estimated error is quantized with a fictitious, positive operational sign in a first programmable logic arrangement and, parallel thereto, is quantized with a fictitious negative operational sign in a second programmable logic arrangement. Of these two quantizing results, the correct result is selected via a multiplexer controlled by the actual operational sign of the estimated error.

REFERENCES:
patent: 4627480 (1987-06-01), Kuroda et al.
patent: 4636856 (1987-01-01), Starck
patent: 4689671 (1987-08-01), Ohki et al.
Pirsch, "Design of a DPCM Codec for VLSI Realization in CMOS", 73 Proc. IEEE, 592, 592-98 (1984).

Affiliated with

Also associated with

Rating

Arrangement for DPCM coding of television signals with fast sign does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Arrangement for DPCM coding of television signals with fast sign, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Arrangement for DPCM coding of television signals with fast sign will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-921013