Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2001-06-18
2002-11-12
Luther, William (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S429000, C370S521000, C710S039000, C710S054000, C710S120000
Reexamination Certificate
active
06480500
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a host channel adapter configured for communication with target channel adapters, and managing queue pairs used in the transmission of data packets in an InfiniBand™ server system.
2. Background Art
Networking technology has encountered improvements in server architectures and design with a goal toward providing servers that are more robust and reliable in mission critical networking applications. In particular, the use of servers for responding to client requests has resulted in a necessity that servers have an extremely high reliability to ensure that the network remains operable. Hence, there has been a substantial concern about server reliability, accessibility, and serviceability.
In addition, processors used in servers have encountered substantial improvements, where the microprocessor speed and bandwidth have exceeded the capacity of the connected input/out (I/O) buses, limiting the server throughput to the bus capacity. Accordingly, different server standards have been proposed in an attempt to improve server performance in terms of addressing, processor clustering, and high-speed I/O.
These different proposed server standards led to the development of the InfiniBand™ Architecture Specification, (Release 1.0), adopted by the InfiniBand™ Trade Association. The InfiniBand™ Architecture Specification specifies a high-speed networking connection between central processing units, peripherals, and switches inside a server system. Hence, the term “InfiniBand™ network” refers to a network within a server system. The InfiniBand™ Architecture Specification specifies both I/O operations and interprocessor communications (IPC).
A particular feature of InfiniBand™ Architecture Specification is the proposed implementation in hardware of the transport layer services present in existing networking protocols, such as TCP/IP based protocols. The hardware-based implementation of transport layer services provides the advantage of reducing processing requirements of the central processing unit (i.e., “offloading”), hence offloading the operating system of the server system.
However, arbitrary hardware implementations may result in substantially costly hardware designs. A host channel adapter (HCA) manages multiple queue pairs (QPs), which are used by consumer applications at InfiniBand™ network nodes for communication of data. Unfortunately, a substantially large number of queue pairs can be generated, which may require the HCA to expand a substantially large amount of resources to manage the large number of queue pairs.
SUMMARY OF THE INVENTION
There is a need for an arrangement that enables a host channel adapter to be implemented in an efficient and economical manner.
There also is a need for an arrangement that enables a host channel adapter to manage multiple queue pairs without a substantial expenditure of resources.
These and other needs are attained by the present invention, where a host channel adapter is configured for efficiently managing multiple queue pairs by compressing queue pairs having similar properties into queue pair tables configured for storing compressed queue pair entries having shared attributes.
One aspect of the present invention provides a method in a host channel adapter. The method includes receiving a request for creation of a new queue pair. The method also includes identifying one of a plurality of queue pair tables by determining a match between at least one selected attribute for the new queue pair with respective shared attributes of the queue pair tables, each queue pair table having compressed queue pair entries representing queue pairs having the corresponding shared attribute. The method also includes storing a new compressed queue pair entry having prescribed attributes of the new queue pair, distinct from the corresponding shared attribute, in the one shared queue pair table having the corresponding shared attribute matching the at least one selected attribute.
Another aspect of the present invention provides a host channel adapter. The host channel adapter includes a queue pair attributes database and a queue pair attributes management module. The queue pair attributes database is configured for storing prescribed attributes of queue pairs, the queue pair attributes database including a plurality of queue pair tables having respective shared attributes, each queue pair table configured for storing compressed queue pair entries representing queue pairs having the corresponding shared attribute. The queue pair attributes management module is configured for storing a new queue pair, as a new compressed queue pair entry, in an identified one of the queue pair tables having the corresponding shared attribute matching at least one selected attribute of the new queue pair, the new compressed queue pair entry having prescribed attributes of the new queue pair, distinct from the corresponding shared attribute.
Additional advantages and novel features of the invention will be set forth in part in the description which follows and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The advantages of the present invention may be realized and attained by means of instrumentalities and combinations particularly pointed in the appended claims.
REFERENCES:
patent: 5442752 (1995-08-01), Styczinski
patent: 6081848 (2000-06-01), Grun et al.
patent: 6094435 (2000-07-01), Hoffman et al.
patent: 6170030 (2001-01-01), Bell
patent: 6243787 (2001-06-01), Kagan et al.
Daniel Cassiday, InfiniBand™ Architecture Tutorial, Hot Chips, Aug. 2000, Sun Microsystems, 79 pages.
Acharya Yatin R.
Erimli Bahadir
Advanced Micro Devices , Inc.
Luther William
Manelli Denison & Selter PLLC
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