Arrangement for capturing data

Details Arrangement for capturing data Arrangement for capturing data

2005-12-06

2005-12-06

Liu, Shuwang (Department: 2634)

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

C375S142000, C375S376000, C375S371000, C370S376000, C370S503000

Reexamination Certificate

active

06973149

ABSTRACT:
An arrangement for capturing data from a data stream of a predetermined data transfer rate using a flip-flop, comprises a symmetrical multi-phase clock generator that is adapted to be locked to a reference clock which in turn is adapted to generate a reference clock signal at the data transfer rate or at a fraction thereof. The multi-phase clock generator is adapted to generate “n” clock signals mutually shifted in phase 360°
from each other. A selector is connected to the clock generator to receive the n clock signals and selects one of these n clock signals as the system clock signal in response to a control signal from a clock phase counter. The clock phase counter is controlled to count up or down in response to the phase of the system clock signal when a predetermined number of data transitions have occurred in the data stream. The flip-flop is controlled by the opposite phase of the system clock signal to capture the data from the data stream.

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patent: 2005/0008111 (2005-01-01), Suzuki
patent: 1 063 809 (2000-12-01), None

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